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Professor Eichi Goto
Quantum Magneto Flux Project
Bassin Shinobazu 202
2-1-42 Ikenchata Taito-ku
Tokyo 110
Japan

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Dear Prof. Goto:

I read your article with Shimizu and Ichikawa about cyclic pipeline computers.

In general I agree that the cyclic pipeline architecture is a 
good way of getting high speed. It will become increasingly important as 
communication delay becomes more important relative to device delays.

However, I do not think it is so important to minimize the number of instruction
streams, because I am confident that the queue based multi-processing techniques
(e.g. Qlisp, Multi Lisp and Ito's project) being developed will lead to good
performance on almost all scientific, algebraic and AI problems. Also, I think
the emphasis in your paper on synchronization instructions is misplaced. Once
debugged, programs can communicate through memory and through an interrupt system
associated with each process. Even the debugging facilities should almost entirely
rely on software. The best hardware aid would be a suspend operation whereby one
process can cause others to suspend operation so that their states can be
examined by program, single-stepped if desired and their operation can be 
resumed.

I enclose our basic paper on Qlisp.

Also, it seems to me that as our respective projects advance, there may develop
a reason for some collaboration.

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Finally, I am thinking about how I might help persuade memory makers to include
pipeline registers.

Many thanks for your hospitality in Tokyo.

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Sincerely,       

John McCarthy    
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Enclosure
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JMC/ra 
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